1. Field of the Invention
The present invention relates to a multi-layer printed wiring board and a method of manufacturing the multi-layer printed wiring board.
2. Discussion of the Background
Japanese Unexamined Patent Publication No. H11-251749 describes a buildup multi-layer printed wiring board having a core substrate and inter-layer insulation resin layers formed on top and bottom surfaces of the core substrate. This printed wiring board has a stacked via structure in which a via hole formed in a lower insulation resin layer is filled with a filler and has a substantially flat surface, and a via hole formed in an upper insulation resin layer is formed right above the via hole formed in the lower insulation resin layer. The contents of this publication are incorporated herein by reference in their entirety.